With quadwords you can store 8 bytes, which is 64 bits. 2^64 = 18,446,744,073,709,551,615, however there aren't many instructions for the 386+ 32-bit architecture that support quadwords (there are a couple though). I would assume that a 64-bit processor architecture would support a lot more quadword instructions... well, if it's a CISC anyway; a RISC probably wouldn't have very many.
But yes, with the usual x86 instruction set, 4,294,967,295 is the largest unsigned number (doubleword size) you can store.
Of course, here we are using floating point operations, so it's a little bit different, since FP numbers are stored in the IEEE floating point format, so the limit of 4,294,967,295 doesn't really apply. I haven't studied floating point operations much yet on the x86, so I don't know how large the registers are, so I don't know how big of numbers it would store, but I will find out and may reply again